发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR EPITAXIAL WAFER AND EPITAXIAL WAFER FOR HETERO BIPOLAR TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor epitaxial wafer together with an epitaxial wafer for a hetero bipolar transistor for preventing drop of current amplification factorβ. SOLUTION: In an epitaxial wafer for HTV, a collector contact layer 8 of n+-GaAs, a collector layer 7 of n-GaAs, a base layer 6 of p+-GaAs, an emitter layer 5 of n-InGaP, and a non-alloy layer 4 of n+-InGaAs are grown by MOVPE method on a semi-insulating GaAs substrate. When GaAs crystal is grown, TEG and TMG of specified mixing ratio are used as a material for Ga of group III. An interface of an InGaP layer is formed where the concentration of a level which is re-coupling center is lower.
申请公布号 JP2002033285(A) 申请公布日期 2002.01.31
申请号 JP20000215054 申请日期 2000.07.14
申请人 HITACHI CABLE LTD 发明人 FUJIO SHINJIRO
分类号 H01L29/73;H01L21/205;H01L21/331;(IPC1-7):H01L21/205 主分类号 H01L29/73
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