发明名称 Modulation circuit, image display using the same, and modulation method
摘要 A modulation circuit capable of high resolution pulse width modulation while keeping down the bit length and an image display provided with the modulation circuit. By the A/D converter 4, the video signal Sv converted into a binary code having a preset bit length is divided into a plurality of binary codes by the controller 3 from the most significant bit to the least significant bit. Corresponding to the thus obtained plurality of divided binary codes, serial data is generated for producing a pulse current of a pulse width and current value according to the value of the binary code and is output to pulse width modulation circuits 1 cascade connected to the controller 3. The pulse width modulation circuits supply LEDs 3 of the pixels pulse currents of pulse widths and current values corresponding to the serial data.
申请公布号 US2002012008(A1) 申请公布日期 2002.01.31
申请号 US20010838380 申请日期 2001.04.20
申请人 TAKAGI YUICHI 发明人 TAKAGI YUICHI
分类号 G09G3/20;G09G3/30;G09G3/32;H03M5/08;H03M5/20;(IPC1-7):G09G5/10 主分类号 G09G3/20
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