| 摘要 |
Methods and structures are provided for forming silicon germanium gate electrodes over gate dielectrics. A thin polysilicon wetting layer (115) provides continuous coverage of the silicon dioxide layer (110) and reduces incubation time for the silicon germanium (120) thereupon. The continuity of the wetting layer (115) leads to a uniformly thick, planar gate electrode structure. At the same time, the polysilicon layer (115) can be made thin enough to minimize thermal requirements for segregating germanium to the electrode-oxide interface, and providing grain boundary diffusion to further facilitate germanium diffusion. Advantageously, the polysilicon wetting layer (115), silicon germanium (120) and a further silicon cap layer (125) are all formed in situ under atmospheric pressures.
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