| 摘要 |
PROBLEM TO BE SOLVED: To provide a semiconductor memory in which a cycle time can be shortened by increasing operation speed of address access. SOLUTION: A 1st address decoder 2 and a 1st refresh address decoder 5 decode respectively an external address Xn supplied from the outside of a semiconductor memory and a refresh address RXn used for refresh in the semiconductor memory. A multiplexer 8 selects a decoding signal XnDm of an external address side or a decoding signal XnRm of a refresh address side so that refresh operation and Read/Write operation are performed continuously in one memory cycle based on an external address transmitting signal EXTR and a refresh address transmitting signal RFTR, and outputs it as a decoding signal XnMm. A word driver 10 activates a word line WLmq by decoding decoding signals XnMm, XpMq selected by the multiplexer 8 or the like. |
