发明名称 VARIABLE DELAY CIRCUIT
摘要 <p>PROBLEM TO BE SOLVED: To provide a variable delay circuit that can control a high frequency signal over a wide range with high accuracy by eliminating occurrence of inversion of a delay time increment due to delay dispersion in the circuit. SOLUTION: Gates 101, 102, 103, 104 are used to distribute an input signal into branches, and the number of circuits connected to each branch signal distribution circuit is limited to prevent attenuation in signal waveform so as to realize delay control of a high frequency signal.</p>
申请公布号 JP2002033646(A) 申请公布日期 2002.01.31
申请号 JP20000217233 申请日期 2000.07.13
申请人 HITACHI LTD 发明人 IRIKURA SHINOBU;FUJITA BUNICHI;NAKAJIMA KAZUNORI;OGIWARA MASAO
分类号 H03K5/13;(IPC1-7):H03K5/13 主分类号 H03K5/13
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