发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR ELEMENT
摘要 <p>PROBLEM TO BE SOLVED: To provide a resin sealed semiconductor device for reduced size of an LSI chip at least in lengthwise direction by housing a large chip in a small package, reducing thermal stress at a wire bonding part and respective structure parts, and assuring the length for lead embedding for less effect of mechanical stress at forming a lead. SOLUTION: There are provided an LSI chip 5 comprising a plurality of bonding pads 1, and a plurality of leads which, arrayed in lengthwise direction of the LSI chip 5, comprise a specified tilted part at least at an internal lead 7, respectively. The bonding pads 1 are provided in line as the central part of the LSI chip 5, with the tilt angles of the tilted parts of the leads 7 becoming larger as they approach an end side of the LSI chip. The width of the internal lead 7 is preferred to be narrower as advances toward the bonding part 1.</p>
申请公布号 JP2002033435(A) 申请公布日期 2002.01.31
申请号 JP20010181382 申请日期 2001.06.15
申请人 HITACHI LTD 发明人 KANEDA AIZO;MITANI MASAO;NAKAMURA SHOZO;NISHI KUNIHIKO;MURAKAMI HAJIME
分类号 H01L23/29;H01L21/60;H01L23/31;H01L23/50;(IPC1-7):H01L23/50 主分类号 H01L23/29
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