发明名称 |
JITTER DETECTING APPARATUS AND PHASE LOCKED LOOP USING THE SAME |
摘要 |
PURPOSE: A jitter detecting apparatus is provided to detect a jitter amount using signals existing at two sampling points around an edge, from an analog-to-digital converted signal. CONSTITUTION: An edge detecting portion(200) judges symbol variation of signals at two successive sampling points from a DC offset-eliminated input signal, and outputs a before-symbol-variation signal and an after-symbol-variation signal as first and second edge signals, respectively. A comparator portion(210) compares the first and second edge signals from the edge detecting portion(200) and outputs any one of the first and second edge signals having a relatively small absolute value. A calculation portion(220) outputs a jitter value by dividing the relatively small absolute value from the comparator portion(210) by a sum of absolute values of the first and second edge signals.
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申请公布号 |
KR20020008273(A) |
申请公布日期 |
2002.01.30 |
申请号 |
KR20000041743 |
申请日期 |
2000.07.20 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
PARK, HYEON SU;SIM, JAE SEONG |
分类号 |
G01R29/02;G01R25/00;G11B20/10;G11B20/14;H03L7/06;H03L7/08;H04L7/033;H04L25/02;(IPC1-7):H03L7/08 |
主分类号 |
G01R29/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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