发明名称 PATH DETECTOR
摘要 <p>PROBLEM TO BE SOLVED: To provide a path detector that can enhance path detection rate by optimizing an MF input level and a lower limit, when a reception base-band signal level fluctuates. SOLUTION: In this path detector, a control section 204 sets a bit segmentation position to a bit number adjustment section 101A, sets a lower limit to a 1st comparator 109A, initializes a counter, discriminates whether the count is within a preset optional path detection maximum time, awaits the processing for a prescribed time when the count is within the path detection maximum time, receives a reception path timing from a 2nd comparator 111, discriminates whether a path is detected, revises a lower limit to the 1st comparator 109A when no path is detected, discriminates whether the count elapses for an arbitrarily preset period time, revises segmentation position of the bit number adjustment section 101A, when the counter elapses for the period time and re-sets the lower limit value to the 1st comparator 109A.</p>
申请公布号 JP2002026764(A) 申请公布日期 2002.01.25
申请号 JP20000208164 申请日期 2000.07.10
申请人 HITACHI KOKUSAI ELECTRIC INC 发明人 HATTORI NORIHIRO
分类号 H04B1/707;H04B1/7093 主分类号 H04B1/707
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