发明名称 MICROCOMPUTER WITH BUILT-IN FLASH EEPROM
摘要 <p>PROBLEM TO BE SOLVED: To eliminate restriction on development of a user program by enabling permission of rewrite of a vector table even when on-board rewrite of a flash EEPROM is adopted in a microcomputer having a CPU to enable vector indirect addressing. SOLUTION: Between the CPU 10 and the flash EEPROM 20, an address control circuit 30 to supply a substitute reset vector address to specify storage place of the leading address of a rewrite control program to the flash EEPROM 20 in place of a reset vector address to be outputted from the CPU 10 so as to specify the head of the vector table is interposed. The rewrite control program to control the on-board rewrite of the flash EEPROM 20 and information to indicate the leading address of the rewrite control program are preliminarily written in an on-board rewrite prohibition area and the vector table is set in the on-board rewrite permission area.</p>
申请公布号 JP2002024043(A) 申请公布日期 2002.01.25
申请号 JP20000207915 申请日期 2000.07.10
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NISHIKAWA KAZUYO
分类号 G06F15/78;G06F11/00;(IPC1-7):G06F11/00 主分类号 G06F15/78
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