| 摘要 |
PROBLEM TO BE SOLVED: To provide a bus bridge circuit capable of accelerating access from one bus to the other bus. SOLUTION: A bus start signal DSEL from a bus A and an access mode switching signal QUICK from an address comparator circuit 112 are inputted to a control circuit 111, and an address transfer request signal ADR-OUT, an ADB data output request signal ADB-OE and a BD data output request BD-OE are outputted to a bus Mux. The bus Mux 12 multiplexes an address signal BA of the bus A and a data signal BD, outputs the result to a bus B as an address/data signal ADB, extracts the data signal from the address/data signal ADB and outputs it to the bus A as a data signal BD. The address comparator circuit 112 compares the values of the address signal BA and an address comparing signal AC and outputs the result as an access mode switching signal QUICK.
|
