发明名称 FAULT NOTICE SYSTEM FOR MULTIPLEXED COMMUNICATION NETWORK
摘要 PROBLEM TO BE SOLVED: To provide a switching system that is less affected by a fault. SOLUTION: A central arithmetic processing section 110A controls a connecting operation of a communication path of a switch 114A and generates a reset signal 122A at a prescribed time interval when the operation of the central arithmetic processing section 110A is normal. A fault monitor section 112A is initialized by a reset signal 122A and does not generate a time-out signal 94 when the operation of the central arithmetic processing section 110A is normal. For example, when the operation of the central arithmetic processing section 110A of an exchange 74 of system 0 is not normal at a lapse of a time set longer than the generation interval of the reset signal 122A, the fault monitor section 112A transmits the time-out signal 94 to an exchange 76 of a 1 system. A central arithmetic processing section 110B in system 1 exchange 76 transmits a system-down signal to lines 84, 86, and 66 via interface sections 102B, 104B, 106B in response to a time-out signal 124. Thus, the fault notice system informs opposite switching systems 12, 42 about the occurrence of a fault in the central arithmetic processing section 110A and the switching systems 12, 42 bypass the exchange 74 and set a communication path via the exchange 76.
申请公布号 JP2002027107(A) 申请公布日期 2002.01.25
申请号 JP20000208224 申请日期 2000.07.05
申请人 OKI ELECTRIC IND CO LTD 发明人 INABA SOICHIRO
分类号 H04M3/22;H04L12/28;H04L29/14;H04Q11/04;(IPC1-7):H04M3/22 主分类号 H04M3/22
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