发明名称 MULTI-CPU SYSTEM PROVIDED WITH SHARED BUS
摘要 PROBLEM TO BE SOLVED: To shorten arbitration wait time in the case of batch read regardless of the number of CPU concerning a multi-CPU system capable of accessing a shared area from plural CPUs via a shared bus available for the bus arbitrating circuit of a local bus. SOLUTION: Each of plural CPUs is provided with a means corresponding to each of CPU for setting an interrupting processing declaration at the time of simultaneously requesting a bus arbitration for shared bus use when an interrupt signal from an interrupt generating unit is received. When one CPU clears the interrupt signal by performing processing by acquiring the shared bus and accessing the shared area by the bus arbitration, the other CPU, which can not acquire the shared bus, forcedly ends processing when the interrupting processing declaration corresponding to the present CPU is set. As read data at the time of end, a predetermined fixed value is generated and the end of access is confirmed.
申请公布号 JP2002024165(A) 申请公布日期 2002.01.25
申请号 JP20000208133 申请日期 2000.07.10
申请人 FUJITSU LTD 发明人 KUBO YOSUKE;YOSHINO ISAO
分类号 G06F9/38;G06F9/46;G06F12/00;G06F13/362;G06F15/177;(IPC1-7):G06F13/362 主分类号 G06F9/38
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