发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR DESIGNING ITS ARRANGEMENT
摘要 PROBLEM TO BE SOLVED: To prevent any possibility that a racing period is generated in a circuit in which the spacing period of two-phase clock signals is necessary. SOLUTION: This semiconductor integrated circuit is provided with a clock signal source for outputting two-phase clock signalsϕ1 andϕ0 having a spacing period, two-phase clock wiring 11 and 12 far transmitting the two-phase clock signals supplied from the clock signal source to latch circuits 15 and 16, and a waveform correction circuit 17 having plural NMOS transistors N1 and N2 connected between the two-phase clock wiring and a GND node for securing the spacing period of the two-phase clock signals.
申请公布号 JP2002026265(A) 申请公布日期 2002.01.25
申请号 JP20000205423 申请日期 2000.07.06
申请人 TOSHIBA LSI SYSTEM SUPPORT KK;TOSHIBA CORP 发明人 SHIMOJU HIROTAKA
分类号 G06F17/50;H01L21/82;H01L21/822;H01L27/04;H01L27/10;H03K5/13;H03K5/151;(IPC1-7):H01L27/04 主分类号 G06F17/50
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