发明名称 AREA-EFFICIENT CONVOLUTIONAL DECODER
摘要 A convolutional decoder for decoding received symbols in a communication system includes a branch metric calculator, and add-compare-select engine and a traceback unit. The branch metric calculator computes branch metrics for transitions in a trellis representative of a convolutional code used to generate the symbols. In accordance with the invention, the branch metrics are computed from an offset binary representation of the symbols using an inverse likelihood function, such that the resulting path metrics grow at a smaller rate and therefore require less memory. The add-compare-select engine processes path metrics generated from the branch metrics so as to determine a selected path through at least a portion of the trellis, and may utilize a state-serial architecture which computes path metrics for k states of a given stage of the trellis per clock cycle, using branch metrics obtained from k sets of registers in the branch metric calculator. The traceback unit generates a sequence of decoded bits from the selected path, and may be configured to include a staging register and a traceback memory. The staging register receives selected path information from the add-compare-select engine, and the contents of the staging register for a given stage of the trellis are loaded into the traceback memory when the staging register becomes full, at a location given by a number of the stage modulo a predetermined traceback length.
申请公布号 US2002010895(A1) 申请公布日期 2002.01.24
申请号 US19980105759 申请日期 1998.06.26
申请人 MUJTABA SYED AON 发明人 MUJTABA SYED AON
分类号 G06F11/10;H03M13/00;H03M13/03;H03M13/23;H03M13/25;H03M13/41;H04L1/00;(IPC1-7):H03M13/03 主分类号 G06F11/10
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