发明名称 LAYOUT METHOD ARRANGING NODES CORRESPONDING TO LSI ELEMENTS HAVING A CONNECTING RELATIONSHIP
摘要 The invention provides an arrangement optimization problem processing apparatus for arranging a plurality of nodes in an optimum condition in a two- or more-dimensional space, by which an optimum arrangement of a plurality of nodes can be determined at a high speed even where a node arrangement optimization problem having a large problem scale is to be processed. The arrangement optimization problem processing apparatus includes a hyper node formation section for grouping the plurality of nodes to form a plurality of hyper nodes each formed from a set of nodes, a hyper node arrangement section for executing an optimization problem solution algorithm to determine solutions to a problem of arrangement of the plurality of hyper nodes formed by the hyper node formation section in the generation space and arranging the plurality of hyper nodes in the generation space based on one of the determined solutions, and a node optimum arrangement section for executing the optimization problem solution algorithm taking arrangement relationships of the plurality of hyper nodes obtained by the hyper node arrangement section into consideration to determine a solution to a problem of arrangement of the plurality of nodes in an optimum condition in the generation space and arranging the plurality of nodes in the generation space based on the determined solution.
申请公布号 US2002010692(A1) 申请公布日期 2002.01.24
申请号 US19980081604 申请日期 1998.05.20
申请人 SASAGAWA FUMIYOSHI;SHINAGAWA AKIO 发明人 SASAGAWA FUMIYOSHI;SHINAGAWA AKIO
分类号 G06F15/18;G06F17/50;G06N3/00;H01L21/82;(IPC1-7):G06F15/18;G06E3/00 主分类号 G06F15/18
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