发明名称 |
DUAL PROCESS SEMICONDUCTOR HETEROSTRUCTURES AND METHODS |
摘要 |
A method for forming an epitaxial layer involves depositing a buffer layer on a substrate by a first deposition process, followed by deposition of an epitaxial layer by a second deposition process. By using such a dual process, the first and second deposition processes can be optimized, with respect to performance, growth rate, and cost, for different materials of each layer. A semiconductor heterostructure prepared by a dual deposition process includes a buffer layer formed on a substrate by MOCVD, and an epitaxial layer formed on the buffer layer, the epitaxial layer deposited by hydride vapor-phase deposition. |
申请公布号 |
EP1173885(A1) |
申请公布日期 |
2002.01.23 |
申请号 |
EP20000922179 |
申请日期 |
2000.04.13 |
申请人 |
CBL TECHNOLOGIES, INC.;MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
SOLOMON, GLENN, S.;MILLER, DAVID, J.;UEDA, TETSUZO |
分类号 |
C30B29/38;H01L21/205;H01L33/00;(IPC1-7):H01L21/31 |
主分类号 |
C30B29/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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