发明名称 |
Computer assisted method of partitioning an electrical circuit |
摘要 |
A partition of an electrical circuit is formed in that the electrical circuit is mapped on a graph (102), and the nodes and/or edges of the graph are assigned weight values (103). The weight values describe a required computing outlay for the calculation of electrical descriptive parameters for the respective elements of the electrical circuit that is represented to the nodes and/or by the edges. A placement method is then applied to the elements of the electrical circuit (104). Next, a measure is calculated of a number, which arises on the basis of a partitioning, of cut edges and/or margin nodes for elements of the electrical circuit (105). The elements are grouped in partitions depending on the previously calculated measure (106).
|
申请公布号 |
US6341364(B1) |
申请公布日期 |
2002.01.22 |
申请号 |
US19990308304 |
申请日期 |
1999.05.17 |
申请人 |
SIEMENS AKTIENGESELLSCHAFT |
发明人 |
WEVER UTZ;ZHENG QINGHUA;FROEHLICH NORBERT |
分类号 |
H01L21/822;G06F17/50;H01L21/82;H01L27/04;(IPC1-7):G06F17/50 |
主分类号 |
H01L21/822 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|