| 摘要 |
A flip-flop control circuit for reducing low-frequency power supply noise, a processor incorporating the flip-flop control circuit, and a method for operating the processor are disclosed. The flip-flop (FF) control circuit, which is connected to a digital circuit having a plurality of FFs, includes: a clock generating circuit which generates a first clock pulse signal of a base frequency synchronized to the frequency of an oscillator such as a crystal oscillator; a clock selecting circuit which generates from the first clock pulse signal a high-speed processing second clock pulse signal having a frequency higher than the base frequency, and outputs the first or second clock pulse signal in accordance with a control signal; a counter circuit which, when determining the states of the plurality of flip-flops, sets the control signal and starts counting the first or second clock pulse signal upon receiving an activation signal thereof, and clears the setting of the control signal upon expiration of a predetermined time; and a clock distributing circuit which distributes the first or second clock pulse signal to the plurality of flip-flops.
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