发明名称 METHOD AND APPARATUS FOR SYNCHRONIZING DYNAMIC RANDOM ACCESS MEMORY EXITING FROM A LOW POWER STATE
摘要 A method and apparatus for exiting a dynamic random access memory from a low power state is provided. The exit from the low power state is first initiated. After the expiration of an exit delay period, a quiet time command is routed through a queue circuit. In one embodiment the use of a bypass circuit allows the interruption of the memory pipeline with a subsequent restart of the pipeline without excessive delay. A flexible clock is delayed by the onset of the quiet time command until the subsequent quiet time event.
申请公布号 WO0143139(A3) 申请公布日期 2002.01.17
申请号 WO2000US41268 申请日期 2000.10.18
申请人 INTEL CORPORATION;VOLK, ANDREW, M. 发明人 VOLK, ANDREW, M.
分类号 G11C5/14;G11C7/10;G11C7/20;(IPC1-7):G11C11/407;G11C7/00 主分类号 G11C5/14
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