发明名称 |
Decoding circuit for controlling activation of wordlines in a semiconductor memory device |
摘要 |
A semiconductor memory device of the invention includes: main decoders for generating wordline enable signals in response to first decoding signals, a first precharge signal, and a second precharge signal; wordline drivers for wordline drive signals in response to the wordline enable signals and second decoding signals; and a circuit for generating the second precharge signal in response to a command signal. The wordline drive signals are inactivated in sequence in response to the first decoding signals and the second precharge signal, in order to reducing ground noises.
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申请公布号 |
US2002006073(A1) |
申请公布日期 |
2002.01.17 |
申请号 |
US20010875371 |
申请日期 |
2001.06.05 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD |
发明人 |
CHOI JONG-HYUN;KANG SANG-SEOK;YOO JEI-HWAN;JOO JAE-HOON |
分类号 |
G11C8/08;G11C8/14;G11C29/34;(IPC1-7):G11C8/00 |
主分类号 |
G11C8/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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