| 摘要 |
PURPOSE: MRAM configuration is provided, in which case a voltage drop occurs between the input of the word and/or bit lines which are connected to the voltage stabilizer device and the output of the lines. CONSTITUTION: Cell blocks(ZB1,ZB2) which are each constructed in the same way as the memory cell array with the word lines(WL1, WL2) and the bit lines(BL2, BL3) and also the individual memory cells formed from the resistor. As an example, just the word lines(WL2) and the bit lines(BL3) in the memory cell blocks(ZB1,ZB2). The memory chip voltage supply is intended to supply here-as is typical-a supply voltage of about 2.5 V. The supply voltage of about 2.5 V is fed to a first voltage stabilizer KR1, which yields from it a constant voltage of 2 V. The voltage of 2 V is fed via a first controlled word line driver(WT1) to the word line(WL2) of the memory cell block(ZB1). The rest of the word lines and also bit lines are provided with corresponding voltage stabilizers(KR1) at their respective input.
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