| 摘要 |
PURPOSE: An enhanced timing module circuit in an exchange is provided to give flexibility to the function addition of an application block by receiving a plurality of input reference clocks and, at the same time, transmitting a plurality of system clock divided frequencies to the application block using a clock driver. CONSTITUTION: An enhanced timing module circuit in an exchange consists of a digital signal processor(200), a multiplexer(201), a phase detector/frequency division circuit(203), a RAM(211), a D/A conversion part(204), an oscillation part(205), a primary frequency division part(207), and a secondary frequency division part/mixing part(209). The digital signal processor(200) generates an instruction for the times of frequency division according to an inputted frequency. The multiplexer(201) selects one among two clocks supplied from an external reference clock source and many reference clocks inputted from subscriber boards. The phase detector/frequency division circuit(203) detects a phase difference from a signal selected at the multiplexer(201) and an oscillation signal and divides the frequency of an inputted reference clock according to the instruction for the times of frequency division. The RAM(211) stores the operation result values of the digital signal processor(200). The D/A conversion part(204) converts the operation result values of the digital signal processor(200) into analog values. The oscillation part(205) oscillates a given frequency from the output of the D/A conversion part(204). The primary frequency division part(207) divides the output frequency of the oscillation part(205) primarily and generates a system clock of 19.44MHz. The secondary frequency division part/mixing part(209) executes the secondary frequency division for the output of the primary frequency division part(207) and generates a local clock necessary for an application block.
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