发明名称 DEVICE FOR DECREASING EXTENDABLE INSTRUCTION
摘要 PURPOSE: A device for decreasing an extendable instruction is provided to process a general instruction next to the following extension instruction promptly and to enhance efficiencies of a central processing unit and a program by reading the general instruction and processing the following extension instruction during an execution for using a constant value more than a size of a general instruction being stored in an extension data storing unit by an extension instruction and data which are addresses of a storing device. CONSTITUTION: An instruction storing unit(100) stores instructions comprising a plurality of general instructions and extension instructions. A temporary storing unit(200) comprises a plurality of buffers performing a pre-fetch and storing of a plurality of instructions from the instruction storing unit(100). An instruction searching unit(300) receives a plurality of instructions being pre-fetched from the instruction storing unit(100) to the temporary storing unit(200) and decodes the received instruction and outputs a position signal(POS) displaying a position of a general instruction and a position of an extension instruction. An instruction selection unit(400) receives a position signal(POS) which is an output of the instruction searching unit(300) and may select a buffer storing the corresponding general instruction and may output general instructions successively. A general instruction interpreting unit(700) receives a general instruction being outputted from the instruction selection unit(400) and outputs a plurality of control signals for executing a general instruction. An extension data interpreting unit(500) may receive operands(OPER1¯OPERn) of a consecutive extension instruction being stored in each buffer and may perform a calculating process of the operands(OPER1¯OPERn). An extension data storing unit(600) receives and stores extension data which are outputs of the extension data interpreting unit(500).
申请公布号 KR20020004024(A) 申请公布日期 2002.01.16
申请号 KR20000036719 申请日期 2000.06.30
申请人 ADVANCED DIGITAL CHIPS INC. 发明人 CHO, GYEONG YEON;KIM, HYEON GYU;LEE, GEUN TAEK;LEE, HUI;LIM, JONG YUN;MIN, BYEONG GWON;OH, HYEONG CHEOL
分类号 G06F9/30;G06F9/28;G06F9/318;G06F9/38;G06F12/04;(IPC1-7):G06F9/30 主分类号 G06F9/30
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