发明名称 |
METHOD FOR MAKING AN INTEGRATED CIRCUIT HAVING A DUMMY STRUCTURE |
摘要 |
<p>A pattern of dummy structures (20) is added to the layout pattern of an integrated circuit (10) to equilibrate the polishing rate across the surface of a semiconductor substrate (11). The location of each dummy structure (20) is predetermined so that it does not intersect a well boundary (17) or an active region (21,27), and does not fall under a conductive material such as a layer of polysilicon (22,28) or an interconnect structure (23,29). <IMAGE></p> |
申请公布号 |
SG85687(A1) |
申请公布日期 |
2002.01.15 |
申请号 |
SG19990006383 |
申请日期 |
1997.08.01 |
申请人 |
MOTOROLA, INC. |
发明人 |
PERCY V. GILBERT;SUBRAMONEY IYER;BRADLEY, P. SMITH;MATTHEW A. THOMPSON;KEVIN KEMP;RAJIVE DHAR |
分类号 |
H01L21/76;H01L21/304;H01L21/3105;H01L21/762;H01L21/768;(IPC1-7):H01L21/76 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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