发明名称 Synchronization lag control apparatus and method
摘要 Conventionally, a particular countermeasure has been taken for each of the error factors. That is, each error requires a circuit and the like for carrying out the countermeasure, which leads to an increase size of the entire circuit.The present invention includes a controller 14 which resets a system time clock STC serving as the system reference time with a time management information PTM in a video decoder 7. This reset time is compared to a time management information PTM or DTM of the video decoder 7 or an audio decoder 11. According to a result of the comparison, the synchronization lag between the video signal and the audio signal is controlled.
申请公布号 US6339675(B1) 申请公布日期 2002.01.15
申请号 US19980037304 申请日期 1998.03.09
申请人 SONY CORPORATION 发明人 SHIMIZU YOSHINORI;HASEGAWA AKIRA;MIZUNO MASAYOSHI;ISHIDA TAKAYUKI
分类号 H04N5/91;H04N5/85;H04N5/92;H04N7/04;H04N7/045;H04N9/806;H04N9/82;(IPC1-7):H04N5/928;H04N5/935 主分类号 H04N5/91
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