发明名称 Pseudo-anding in dynamic logic circuits
摘要 A typical domino logic circuit has a foot device, which is the n-type evaluate transistor coupled between the n-type logic circuitry receiving the data inputs and the ground potential. This AND function provides an opportunity to move full domino AND blocks fed by full domino books of any type to the clock input of the source book. This makes the source book act like a pseudo-clocked book with a reset that must propagate from the AND block moved to its clock input. If the AND block were on the critical path, a complete stage of logic can be removed.
申请公布号 US6339835(B1) 申请公布日期 2002.01.15
申请号 US19990329455 申请日期 1999.06.10
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 REDDY LAKSHMI NARASIMHA;ROSSER THOMAS EDWARD
分类号 G06F17/50;H03K19/096;(IPC1-7):G06F17/50 主分类号 G06F17/50
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