摘要 |
A clock driver formation region in which clock drivers are formed is disposed in a position overlapping, in a plan view, with a ring interconnection line and a mesh interconnection line extending over a semiconductor substrate region. An extra region dedicated to the clock driver formation region is not required, and the clock drivers are dispersed in a circuit device. Therefore, by adjusting drive capabilities of the clock drivers, a clock skew can be reduced, and electromagnetic noises during operation of the clock driver can be absorbed by interconnection lines at a higher layer.
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