| 摘要 |
A delay circuit for delaying propagation of a signal between an input node and an output node, the circuit consisting a delay node coupled to receive the signal at the input node; a first transistor coupled between the delay node and an intermediate node; a second transistor coupled between the intermediate node and a supply voltage and having its gate node coupled to the intermediate node, the first and second transistors operate to delay the signal being propagated from the input node to the output node whereby the transistors compensate for processing variation on propagation delay. |
