| 摘要 |
PROBLEM TO BE SOLVED: To improve the performance of a cache memory used by a digital data processing system, and to reduce its power consumption. SOLUTION: A controller 114 store state information on the access style, operation mode, and cache hit/miss result of the latest access to a tag RAM circuit 108a, judges whether the current access is the same with the last accessed cache line, on the basis of some of last access relative state information and the set field of a main memory address for the current access, and skips access to the tag RAM circuit 108a, when the current access is the same with the last accessed cache line.
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