发明名称 PROCEDE DE REALISATION D'UNE GRILLE POUR UNE STRUCTURE DE TRANSISTOR CMOS A CANAL DE LONGUEUR REDUITE
摘要 The invention concerns a method for producing a gate for a CMOS transistor structure from a stack made on a semiconductor material surface of a substrate, said stack comprising successively a gate insulating layer, a gate material layer and a gate mask, the method comprising the following steps: a) anisotropic etching of the top part of the gate material not masked by the gate mask, said etching step allowing to subsist the lower part of the gate material and producing the formation, on the flanks of the etchings resulting from anisotropic etching, a deposit consisting of etching products; b) treating the deposit consisting of etching products to make therefrom a protective layer against subsequent etching of the gate material; etching, down to the gate insulating layer, the lower part of the gate material, said etching comprising an isotropic etching of the gate material to provide the gate with a shorter length at its base than at its top.
申请公布号 FR2811474(A1) 申请公布日期 2002.01.11
申请号 FR20000008917 申请日期 2000.07.07
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE 发明人 JOUBERT OLIVIER;CUNGE GILLES;FOUCHER JOHANN;FUARD DAVID;BONVALOT MARCELINE;VALLIER LAURENT
分类号 H01L21/28;H01L29/423;H01L29/49 主分类号 H01L21/28
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