摘要 |
The memory circuit comprises a number of blocks (4), e.g. 8 of which 3 are represented, of memory cells organized in rows and columns, and at least one redundant row (16') formed by redundant memory cells and placed outside the blocks of memory circuit. The memory circuit also comprises a control block (18') for invalidating the writing/reading of a defective memory cell of any block of the memory circuit and for allowing after replacement the writing/reading of a memory cell of the redundant row. Each block (4) is adjoined by a rows decoder (8), and the control block (18') is connected to the rows decoder of each block for invalidating the writing/ reading of defective memory cell. The memory cells of rows of blocks and the redundant row form words, and a word of a row of any block containing a defective cell is replaced by a word of the redundant row. A row of any block containing defective memory cell is replaced by one of the redundant rows. Each redundant memory cell is of a static memory type. |