发明名称 DIGITAL CONTROL DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To structure as a synchronous order circuit and to realize high processing capability which fits to the response speed of a hardware about a digital control device which realizes a prescribed function in cooperation with input and output devices. SOLUTION: This is structured as a synchronous order circuit which works synchronously to a clock signal, and it has a main processing means which generalizes the movement of one device or more N by conducting a prescribed process based upon RISK logic and accumulative logic and has a clock generating means which supplies clock signals to the main processing means. The main processing means checks whether access is correct or not to one specified device or more n (<=N) in one device or more N. The clock generating means changes the frequency of the clock signals, and sets the frequency of the clock signals under the maximum frequency which the result of the main processing means's check is true under the clock signals of the frequency.</p>
申请公布号 JP2002006981(A) 申请公布日期 2002.01.11
申请号 JP20000184752 申请日期 2000.06.20
申请人 FUJITSU LTD 发明人 KAWANO OSAMU
分类号 G06F1/08;H04L7/00 主分类号 G06F1/08
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