| 摘要 |
PROBLEM TO BE SOLVED: To provide a layout design method for a gate array semiconductor integrated circuit that can prevent the occurrence of noise and malfunctions due to current flow between plural circuit blocks in a well in which each power supply need be separated, and a semiconductor integrated circuit based on the layout design method. SOLUTION: In this layout design method of a gate array semiconductor integrated circuit device, when first circuit block operated by a first power supply and second block operated by a second power supply are arranged to face each other at least partially, in order to make discontinuous a diffusion area which exists between the first circuit block and the second circuit block and the second circuit block and extends in the direction to connect the first circuit block with the second circuit block, unused basic cell areas are inserted in the middle of the diffusion area.
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