发明名称 SEMICONDUCTOR DEVICE AND ARRANGEMENT METHOD OF DUMMY PATTERN
摘要 PROBLEM TO BE SOLVED: To improve the flatness of a semiconductor device. SOLUTION: The semiconductor device is provided with a semiconductor board 1, a first A/A dummy pattern 5a on the element separation area of the semiconductor board 1, and a second A/A dummy pattern 5b having a smaller pitch than the first A/A dummy pattern 5a. The arrangement of the first and second A/A dummy patterns 5a, 5b is performed in another step. The semiconductor device has the dummy patterns arranged in response to the occupation rate of an element pattern in a mesh area dividing the area on the semiconductor board into plurality in the other aspect.
申请公布号 JP2002009161(A) 申请公布日期 2002.01.11
申请号 JP20010012789 申请日期 2001.01.22
申请人 MITSUBISHI ELECTRIC CORP 发明人 KAWASHIMA HIKARI;OKADA MASAKAZU;KITANI TAKESHI;IGARASHI MOTOSHIGE
分类号 G06F17/50;H01L21/3205;H01L21/76;H01L21/82;H01L21/822;H01L23/52;H01L27/04;(IPC1-7):H01L21/82;H01L21/320 主分类号 G06F17/50
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