| 摘要 |
<p>PROBLEM TO BE SOLVED: To solve a problem in a conventional packet control system and device that requires a large memory capacity when providing a packet transmission scheduler. SOLUTION: The packet controller of this invention is provided with a packet reception section 1 that generates a control cell from a received packet through a packet input channel, a scheduling section 4 that applies scheduling to the control cell and writes the result to a buffer, a control cell shared buffer 7 that stores the written control cell, a CAM 5 consisting of VALID, TS and CNT contents to set up a link between the control cell on the control cell shared buffer 7 and the scheduler, a transmission start section 6 that starts transmission of the scheduled control cell according to a time, a packet buffer 2 that stores the entity of the received packet, and a packet transmission section 3 that extracts a pointer from the control cell whose transmission is started, reads the received packet from the packet buffer and transmits the packet to the packet output channel.</p> |
