发明名称 METHOD FOR MANUFACTURING STACKED DOUBLE POLYSILICON/MOS CAPACITOR USING SiGe INTEGRAL MECHANISM
摘要 PROBLEM TO BE SOLVED: To provide a stacked double polysilicon/MOS capacitor useful as the component of a BiCMOS device including a semiconductor substrate forming a first conductivity-type area on the surface. SOLUTION: A gate oxide overlapped on the first conductivity-type area is formed on the semiconductor substrate. A first polysilicon layer doped with an N type dopant or a P type dopant is formed at least on a gate oxide layer. A dielectric layer is formed on the first polysilicon layer. A second polysilicon layer doped with the same dopant as the first polysilicon layer or a different dopant is formed on the dielectric layer.
申请公布号 JP2002009163(A) 申请公布日期 2002.01.11
申请号 JP20010113510 申请日期 2001.04.12
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 DOUGLAS D KUURUBAAGU;DUNN JAMES STUART;ST ONGE STEPHEN ARTHUR
分类号 H01L27/04;H01L21/02;H01L21/822;H01L21/8249;H01L27/06;H01L29/94;(IPC1-7):H01L21/822;H01L21/824 主分类号 H01L27/04
代理机构 代理人
主权项
地址
您可能感兴趣的专利