发明名称 METHOD FOR CONTROLLING REDUCTION OF CELL PROCESSING INTERVAL TIME IN ATM NETWORK AND MULTIPLEXING APPARATUS
摘要 <p>PROBLEM TO BE SOLVED: To provide a multiplexing apparatus that can reduce a delay time with respect to data transmission in an ATM network. SOLUTION: The multiplexing apparatus 103 is provided with a route selection section 404 that receives data sent from a data communication unit 101 and to be sent in the ATM network, a cell assembling section 407 that assembles cells from the received data, and a clock generating section 409 that generates an internal timing signal 412 corresponding to a multiple of n (n is a natural number) of a communication speed used for the transmission of the received information and an external timing signal 413 corresponding to the communication speed, and the cell assembly section 407 samples data to be transmitted on the basis of the internal timing signal 412 and uses the sampled data to assemble cells.</p>
申请公布号 JP2002009792(A) 申请公布日期 2002.01.11
申请号 JP20000191246 申请日期 2000.06.26
申请人 HITACHI TELECOM TECHNOL LTD 发明人 ATSUMI EISUKE;TAKEUCHI KIMITOSHI;SUZUKI TATSUYA;HASHIMOTO HIROAKI
分类号 H04L12/28;(IPC1-7):H04L12/28 主分类号 H04L12/28
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