SEMICONDUCTOR MEMORY DEVICE

摘要

PROBLEM TO BE SOLVED: To avoid the interruption of reading out and writing operations for fresh operation with a semiconductor memory device having memory cells of a 2TR1C type. SOLUTION: This device has the plural memory cells of the 2TR1C type, a refresh timer which outputs a refresh request signal, a command generating circuit which outputs a reset signal every time a reading out or writing command is inputted and a refresh control circuit which outputs a refresh command for performing the refresh operation in accordance with the timing at which the refresh request signal and reset signal are outputted. The refresh operation is performed by using another bit lines during the period when burst data transfer is performed by using one bit line of the first bit line and second line in each memory cell.