发明名称 METHOD FOR AUTOMATICALLY ADJUSTING PHASE OF SAMPLING CLOCK AND DISPLAY DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a method for automatically adjusting a phase of a sampling clock to an optimal value without causing deterioration in picture quality such as blotting on a display picture. SOLUTION: In this method, processing, comprising a step (S3) for stopping writing a digital picture signal in frame memory after storing a present value px of the phase of the sampling clock as a 1st phase value, a step (S4) for setting the phase of the sampling clock to a 2nd phase value and sampling a fixed number of input video signals, a step (S5) for obtaining a phase data presenting a phase difference between the sampling clock and the input video signal from the sampled value, a step (S6) for resetting the phase of the sampling clock to the stored 1st phase value px and sampling the input video signal, and a step (7) for restarting writing in the frame memory, is repeatedly performed while increasing the 2nd phase value by a prescribed valueδ.
申请公布号 JP2002006792(A) 申请公布日期 2002.01.11
申请号 JP20000191991 申请日期 2000.06.27
申请人 NEC MITSUBISHI DENKI VISUAL SYSTEMS KK 发明人 IWATAKA HIROKI;TACHIBANA MIYUKI
分类号 G09G3/36;G09G3/20;H04N5/12;(IPC1-7):G09G3/20 主分类号 G09G3/36
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