发明名称 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor device which can make a body contact while electrically isolating between an NMOS transistor and a PMOS transistor by complete isolation. SOLUTION: First, element isolation insulating films 7a to 7c of partial isolation type are formed in a first principal plane of a silicon layer 3. Next, a PMOS transistor, an NMOS transistor, a multilayer wiring structure, a spiral inductor 20 and a pad 22 are formed respectively. Next, a support substrate 23 is formed on the entire surface. Next, a second principal plane of the silicon layer 3 is exposed by removing a silicon substrate 1 and a BOX layer 2. Next, the element separation insulation films 27a to 27b which are connected with the element isolation insulating films 7a, 7b are formed from the second principal plane side of the silicon layer 3. With such a constitution, complete isolation is achieved.</p>
申请公布号 JP2002009299(A) 申请公布日期 2002.01.11
申请号 JP20000322352 申请日期 2000.10.23
申请人 MITSUBISHI ELECTRIC CORP 发明人 MAEDA SHIGENOBU
分类号 G03F1/30;G03F1/68;G03F7/20;H01L21/027;H01L21/336;H01L21/76;H01L21/762;H01L21/822;H01L21/8234;H01L21/8238;H01L27/04;H01L27/06;H01L27/08;H01L27/092;H01L29/786;(IPC1-7):H01L29/786;G03F1/08;H01L21/823 主分类号 G03F1/30
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