发明名称 PLL CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a PLL circuit that selects a low conversion coefficient for a voltage controlled oscillator, which constitutes the PLL circuit, so as to improve the stability of an oscillated frequency thereby reducing jitters in an oscillated signal. SOLUTION: A phase comparator circuit 201 compares the phase of a reference signal Sref with a phase of an oscillation signal SVCO, a charge pump 203 and a low-pass filter 206 generate a control signal VCNT in response to the comparison result, gives the control signal to a channel forming region of a PMOS transistor(TR), which is a component of each inverter of a voltage- controlled oscillator VCO 207 for controlling the oscillated frequency of the VCO, then a conversion coefficient KV of the VCO can be set lower, thereby realizing the stability of the oscillated frequency and reduction in the jitter of the oscillated signal SVCO.
申请公布号 JP2002009615(A) 申请公布日期 2002.01.11
申请号 JP20000187534 申请日期 2000.06.19
申请人 SONY CORP 发明人 OGATA TOSHIYUKI
分类号 H03K3/03;H03L7/099;(IPC1-7):H03L7/099 主分类号 H03K3/03
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