发明名称 |
LOW POWER CONSUMPTION COMPUTER SYSTEM |
摘要 |
<p>PROBLEM TO BE SOLVED: To reduce the power consumption of the whole of a computer system while guaranteeing the security in the normal operation and the system performance of the computer system. SOLUTION: A clock driver 4 supplies a PCI clock to be the base of operation of plural PCI devices 5 (including a North bridge 100 and a South bridge 200). The North bridge 100 has functions for detecting whether a PCI bus 10 is in an idle state or not by monitoring the PCI bus 10, previously detecting the presence/absence of prospected PCI bus use thereafter by monitoring a bus use request and a command execution request from each of plural PCI devices 5 (including the South bridge 200) and controlling the stop/frequency reduction of the PCI clock on the basis of the detected result when it is judged that 'the PCI bus is in the idle state and there is no promising in the use of the PCI bus for a while for all the PCI devices'.</p> |
申请公布号 |
JP2002007316(A) |
申请公布日期 |
2002.01.11 |
申请号 |
JP20000182810 |
申请日期 |
2000.06.19 |
申请人 |
NIIGATA FUJI XEROX MANUFACTURING CO LTD |
发明人 |
NAKAMURA KAZUTOSHI |
分类号 |
G06F13/36;G06F1/04;(IPC1-7):G06F13/36 |
主分类号 |
G06F13/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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