发明名称 NON-VOLATILE MEMORY RECORDING MULTI-VALUED DATA
摘要 PURPOSE: To provide a read-out buffer circuit having simple constitution and a program circuit being suitable for programming multi-valued data, in a multi- valued recording non-volatile memory. CONSTITUTION: This circuit has a read-out buffer circuit PB connected to a bit line and detecting a threshold voltage state of a cell transistor MC which can hold a threshold voltage state of 22. The circuit reads out data of 2 bits. Therefore, the circuit has a latch circuit of read-out data and first, second latch inversion circuits reversing a latch state to the first and the second states according to a detected threshold voltage state. When a first bit is read out, the read-out buffer circuit reverses/non-reverses the latch circuit by a first latch reversing circuit in accordance with a detected threshold voltage state, and outputs the latch state as first data Q2. Further, the circuit reverses/non- reverses the latch circuit by the first and the second latch inversion circuit in accordance with a latch state corresponding to the first data and a threshold voltage state.
申请公布号 KR20020003074(A) 申请公布日期 2002.01.10
申请号 KR20010005561 申请日期 2001.02.06
申请人 FUJITSU LIMITED 发明人 KAWAMURA SHOICHI
分类号 G11C16/02;G11C11/56;G11C16/06;G11C16/10;G11C16/26;(IPC1-7):G11C16/06 主分类号 G11C16/02
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