| 摘要 |
PURPOSE: A main word line driving circuit is buffer layer provided, which can enable a word line rapidly by accelerating a slope of a main word line signal. CONSTITUTION: A main word line driver part(10) generates a main word line driving signal(MWL) to drive a main word line(MWL) by the assembly of selected addresses. N local word line driver part(20n) drive each word line(WL) by inputting the main word line driving signal. And a main word line buffering circuit part(30) buffers a voltage level state of the main word line driving signal. The main word line buffering circuit part comprises a PMOS transistor(MP1) supplying a power supply voltage(Vcc) to the main word line driving signal, an NMOS transistor(MN1) making a voltage of a gate terminal of the PMOS transistor as a ground voltage(Vss) when the main word line driving signal has a high level, and a PMOS transistor(MP2) supplying the ground voltage to the main word line driving signal when the main word line driving signal has a low level.
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