发明名称 METHOD FOR FORMING ISOLATION LAYER OF SEMICONDUCTOR DEVICE
摘要 PURPOSE: A method for forming an isolation layer of a semiconductor device is provided to prevent a reduction in cell current due to loss of an active region caused by a shallow trench isolation process, to reduce self-aligned contact resistance by increasing the active region for self-aligned contact, and to improve circuit operating speed. CONSTITUTION: After the first silicon oxide layer(12a) and a silicon nitride layer(13a) are formed and patterned on a silicon substrate(11), a trench is formed in the silicon substrate(11). Then, a silicon epitaxial layer is formed on a surface of the trench. Next, the second silicon oxide layer is formed on entire exposed surfaces including the epitaxial layer and then etched back. Therefore, the second silicon oxide layer remains only on the sidewalls of the patterned layers(12a,13a) to expose the epitaxial layer. The exposed epitaxial layer is then oxidized, so that the third silicon oxide layer(18) is formed on the surface of the epitaxial layer to round off edges of the trench. Thereafter, the fourth silicon oxide layer(19) is deposited to fill the trench and then planarized.
申请公布号 KR20020002691(A) 申请公布日期 2002.01.10
申请号 KR20000036943 申请日期 2000.06.30
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, MYEONG GYU
分类号 H01L21/76;H01L21/762;(IPC1-7):H01L21/76 主分类号 H01L21/76
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