| 摘要 |
PURPOSE: A method for fabricating a semiconductor device is provided to reduce the number of processes by simultaneously forming bit line contact holes of a cell region and a peripheral region. CONSTITUTION: A plurality of word lines(32), each having a cap gate insulating layer thereon, are formed on a substrate(31) in which the cell region and the peripheral region are defined. Next, the first and the second insulating layers are sequentially formed on the substrate(31) including the word lines(32). Then, sidewalls(37) of the word lines(32) in the cell region are formed from the first insulating layer, whereas sidewalls(39) of the word lines(32) in the peripheral region are formed from the first and the second insulating layers. In addition, while the sidewalls(37) are formed, the cap gate insulating layer in the peripheral region is removed. Thereafter, a plug layer is formed between the adjacent word lines(32) in the cell region, and an interlayer dielectric layer is formed over an entire structure. Then, the bit line contact holes are simultaneously formed in the dielectric layer.
|
