SEMICONDCTOR DEVICE WITH MULTI-LEVEL INTERCONNECT HAVING EMBEDDED LOE DIELECTRIC CONSTANT LAYER AND PROCESS FOR MAKING SAME

摘要

A process for fabricating a multi-layer interconnect in which an organic low-k material is formed over a topographic substrate. An insulator such as silicon dioxide is formed over the organic low-k material. The insulator is planarized. Contact holes or vias are then etched in the two-layer stack.