METHOD FOR FABRICATING SEMICONDUCTOR DEVICE

摘要

PURPOSE: A method for fabricating a semiconductor device is provided to guarantee a process margin regarding misalignment in a bitline process or Vss line contact mask process by making the upper corner of a gate pattern formed of an insulation layer so that a space between a gate electrode and a bitline is increased. CONSTITUTION: The first conductive layer for the gate electrode is deposited on a semiconductor substrate(11). A predetermined central region of the gate electrode is covered with a mask and a partial thickness of the first conductive layer is etched. The first insulation layer is deposited on the resultant structure. The first insulation layer is etched back. The first insulation layer and the first conductive layer are sequentially etched to form the gate pattern having the first insulation layer in the upper corner of the gate pattern by using a gate mask. A source/drain junction is formed. The second insulation layer which is planarized is formed on the resultant structure. The second conductive layer contact is formed which passes through the side surface of the first conductive layer and comes in contact with the source/drain junction.