发明名称 WAFER LEVEL PACKAGE
摘要 PURPOSE: A wafer level package is provided to control a phenomenon that a crack is generated on a solder ball, by making metal pieces built in an insulation layer located in a lower portion of a ball land so that a thermal expansion coefficient of the insulation layer is decreased by the metal pieces. CONSTITUTION: Bond pads(11) are formed on the surface of a semiconductor chip. A lower insulation layer(20) is formed on the semiconductor chip to expose the bond pads. Several metal pieces(30) are evaporated on the lower insulation layer. An upper insulation layer(21) is applied on the lower insulation layer to expose the bond pads wherein the metal pieces are built in the upper insulation layer. A metal pattern(31) is evaporated on the upper insulation layer. One end of the metal pattern is connected to each bond pad, and the other end of the metal pattern is located on the metal pieces. A solder resist(22) is formed on the upper insulation layer to expose the other end of the metal pattern. The solder ball(40) is mounted on the other end of the metal pattern.
申请公布号 KR20020002063(A) 申请公布日期 2002.01.09
申请号 KR20000036500 申请日期 2000.06.29
申请人 HYNIX SEMICONDUCTOR INC. 发明人 CHOI, GWANG SEONG
分类号 H01L23/48;(IPC1-7):H01L23/48 主分类号 H01L23/48
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