| 摘要 |
PURPOSE: To provide a semiconductor memory, having hierarchical IO structure in which high integration, stabilization of operation, and high speed are realized. CONSTITUTION: Plural memory array regions, including plural memory cells provided correspondingly to intersections of plural bit lines provided along a first direction, and plural word lines provided along a second direction intersecting orthogonally to the first direction, are provided in the first direction and arranged alternately with sense amplifier regions, bit lines corresponding to the sense amplifier regions and a first common input/output line connected through a first selecting circuit are provided. A signal transmitting path of transmitting a read-out signal and write-in signal between the memory cells extended in the two directions is given as the plural first common input/output lines, corresponding to plural memory arrays arranged along the first direction and a second common input/output lines connected through a second selecting circuit.
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